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1. 计算机原理课件下载： | Chapter | PPT File | Suggested Reading | Title | | Chap 1 Chap 2 |  1.ppt
| Preface xvii~xx, 1.1, 2.1 | Introduction to Computer Systems Information is Bits+Context Information Storage | | 2.ppt | 2.2 | Integer Representations | | | 3.ppt | 2.3,2.4 | Integer Operations, Floating Points | | Chap 3 | 4.ppt | 1.2, 3.1, 3.2, 3.3, 3.4.1 | Machine-Level Representation of Programs I | | | 5.ppt | 3.4, 3.5, 3.6 | Machine-Level Representation of Programs II | | | 6.ppt | 3.4, 3.7, 3.8 | Procedure Call, Array | | | 7.ppt | 3.9,3.10, 3.11, 3.13, 3.14 | Heterogeneous Data Structures & Alignment, Putting it Together, Floating Point | | Chap 4 | 8.ppt | 4.1,4.2 | Processor Architecture | | | 9-10.ppt | 4.3 | Sequential CPU Implementation | | | 11.ppt | 4.4 | Pipelined Implementation Part I | | | 12.ppt | 4.5 | Pipelined Implementation Part II | | Chap 5 | 12b.ppt | 5.3~5.6 | Code Optimization | | | 13.ppt | 5.1,5.7~5.16 | Code Optimization | | Chap 1 | 14.ppt | 1.4~1.6 | Hardware Organization | | Chap 6 | 15.ppt | 6.1,6.2,6.3 | Memory Hierarchy | | | 16.ppt | 6.4, 6.5, 6.6 | Cache Memory | | | 17.ppt | 6.6,6.7 | Cache Memory | | Chap 10 | 22.ppt | 10.1~10.6 | Virtual Memory | | | 23.ppt | 10.6, 10.3, 10.7, 10.8 | Virtual Memory | | | 24.ppt | 10.9 | Dynamic Memory Allocation | | | | | | | Chap 7 | 17-2 | 6.6,6.7 7.1,7.2 | Cache Memory Linking | | | 18.ppt | 7.3~7.5, 7.7~7.9 | Linking II | | Chap 8 | 19 | 1.7, 8.1, 8.2 | Exceptional Control Flow I | | | | | |
2. 习题课课件 | Chapter | PPT File | Suggested Reading | Title | | Chap 2 | chapter2.pptx | 2.1 | Information Storage | | 2.2 | Integer Representations | | 2.3,2.4 | Integer Operations, Floating Points | | Chap 3 |  chapter3.pptx chapter3(1).pptx chapter3(2).ppt | 3.1, 3.2, 3.3, 3.4.1 | Machine-Level Representation of Programs I | | 3.4, 3.5, 3.6 | Machine-Level Representation of Programs II | | 3.4, 3.7, 3.8 | Procedure Call, Array | | 3.9,3.10, 3.11, 3.13, 3.14 | Heterogeneous Data Structures & Alignment, Putting it Together, Floating Point | | Chap 4 | chapter4.pptx | 4.1,4.2 | Processor Architecture | | 4.3 | Sequential CPU Implementation | | 4.4 | Pipelined Implementation Part I | | 4.5 | Pipelined Implementation Part II | | Chap 5 | chapter5.pptx | 5.3~5.6 | Code Optimization | | 5.1,5.7~5.16 | Code Optimization | | Chap 6 | chapter6.ppt | 6.1,6.2,6.3 | Memory Hierarchy | | 6.4, 6.5, 6.6 | Cache Memory | | 6.6,6.7 | Cache Memory | | Chap 10 | | 10.1~10.6 | Virtual Memory | | 10.6, 10.3, 10.7, 10.8 | Virtual Memory | | 10.9 | Dynamic Memory Allocation | | Chap 7 | | 7.1,7.2 | Linking | | 7.3~7.5, 7.7~7.9 | Linking II | | Chap 8 | | 1.7, 8.1, 8.2 | Exceptional Control Flow I | | | | | |
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